Common-Centroid Layouts for Analog Circuits: Advantages and Limitations

Arvind K. Sharma; Meghna Madhusudan; Steven M. Burns; Parijat Mukherjee; Soner Yaldiz; Ramesh Harjani; Sachin S. Sapatnekar

doi:10.23919/DATE51398.2021.9474244

Common-Centroid Layouts for Analog Circuits: Advantages and Limitations

Arvind K. Sharma, Meghna Madhusudan, Steven M. Burns, Parijat Mukherjee, Soner Yaldiz, Ramesh Harjani, Sachin S. Sapatnekar

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

16 Scopus citations

Abstract

Common-centroid (CC) layouts are widely used in analog design to make circuits resilient to variations by matching device characteristics. However, CC layout may involve increased routing complexity and higher parasitics than other alternative layout schemes. This paper critically analyzes the fundamental assumptions behind the use of common-centroid layouts, incorporating considerations related to systematic and random variations as well as the performance impact of common-centroid layout. Based on this study, conclusions are drawn on when CC layout styles can reduce variation, improve performance (even if they do not reduce variation), and when non-CC layouts are preferable.

Original language	English (US)
Title of host publication	Proceedings of the 2021 Design, Automation and Test in Europe, DATE 2021
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1224-1229
Number of pages	6
ISBN (Electronic)	9783981926354
DOIs	https://doi.org/10.23919/DATE51398.2021.9474244
State	Published - Feb 1 2021
Event	2021 Design, Automation and Test in Europe Conference and Exhibition, DATE 2021 - Virtual, Online Duration: Feb 1 2021 → Feb 5 2021

Publication series

Name	Proceedings -Design, Automation and Test in Europe, DATE
Volume	2021-February
ISSN (Print)	1530-1591

Conference

Conference	2021 Design, Automation and Test in Europe Conference and Exhibition, DATE 2021
City	Virtual, Online
Period	2/1/21 → 2/5/21

Bibliographical note

Funding Information:
This work is supported in part by the DARPA IDEA program, as part of the ALIGN project, under SPAWAR Contract N660011824048.

Publisher Copyright:
© 2021 EDAA.

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Sharma, A. K., Madhusudan, M., Burns, S. M., Mukherjee, P., Yaldiz, S., Harjani, R., & Sapatnekar, S. S. (2021). Common-Centroid Layouts for Analog Circuits: Advantages and Limitations. In Proceedings of the 2021 Design, Automation and Test in Europe, DATE 2021 (pp. 1224-1229). Article 9474244 (Proceedings -Design, Automation and Test in Europe, DATE; Vol. 2021-February). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/DATE51398.2021.9474244

Common-Centroid Layouts for Analog Circuits: Advantages and Limitations. / Sharma, Arvind K.; Madhusudan, Meghna; Burns, Steven M. et al.
Proceedings of the 2021 Design, Automation and Test in Europe, DATE 2021. Institute of Electrical and Electronics Engineers Inc., 2021. p. 1224-1229 9474244 (Proceedings -Design, Automation and Test in Europe, DATE; Vol. 2021-February).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Sharma, AK, Madhusudan, M, Burns, SM, Mukherjee, P, Yaldiz, S, Harjani, R & Sapatnekar, SS 2021, Common-Centroid Layouts for Analog Circuits: Advantages and Limitations. in Proceedings of the 2021 Design, Automation and Test in Europe, DATE 2021., 9474244, Proceedings -Design, Automation and Test in Europe, DATE, vol. 2021-February, Institute of Electrical and Electronics Engineers Inc., pp. 1224-1229, 2021 Design, Automation and Test in Europe Conference and Exhibition, DATE 2021, Virtual, Online, 2/1/21. https://doi.org/10.23919/DATE51398.2021.9474244

Sharma AK, Madhusudan M, Burns SM, Mukherjee P, Yaldiz S, Harjani R et al. Common-Centroid Layouts for Analog Circuits: Advantages and Limitations. In Proceedings of the 2021 Design, Automation and Test in Europe, DATE 2021. Institute of Electrical and Electronics Engineers Inc. 2021. p. 1224-1229. 9474244. (Proceedings -Design, Automation and Test in Europe, DATE). doi: 10.23919/DATE51398.2021.9474244

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abstract = "Common-centroid (CC) layouts are widely used in analog design to make circuits resilient to variations by matching device characteristics. However, CC layout may involve increased routing complexity and higher parasitics than other alternative layout schemes. This paper critically analyzes the fundamental assumptions behind the use of common-centroid layouts, incorporating considerations related to systematic and random variations as well as the performance impact of common-centroid layout. Based on this study, conclusions are drawn on when CC layout styles can reduce variation, improve performance (even if they do not reduce variation), and when non-CC layouts are preferable. ",

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Common-Centroid Layouts for Analog Circuits: Advantages and Limitations

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