Abstract
This paper presents a methodology for fast time-domain simulation of analog systems with nonlinear parameters. Specifically, the paper focuses on Δ Σ analog-to-digital converters (ADC). The method creates compiled-code simulators based on symbolic analysis. Code is optimized using loop invariant elimination and constant folding, well-known compiler optimization methods. Circuits are described as structural macromodels. Nonlinear parameters are expressed using piecewise linear (PWL) models. The paper presents a technique for automatically creating PWL models through model extraction from trained neural networks. As compared to existing behavioral simulation methods for Δ Σ ADC, this technique is more systematic and accurate. In our experiments, compiled-code simulation was significantly faster than numerical simulation. Hence, the methodology is very useful in analog and mixed-signal system synthesis, which is known to require a large number of simulation steps.
Original language | English (US) |
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Pages (from-to) | 193-208 |
Number of pages | 16 |
Journal | Integration, the VLSI Journal |
Volume | 40 |
Issue number | 3 |
DOIs | |
State | Published - Apr 2007 |
Bibliographical note
Funding Information:This work was supported by Defense Advanced Research Projects Agency (DARPA) and managed by the Sensor Directorate of the Air Force Research Laboratory USAF, Wright-Patterson AFB, OH 45433-6543.
Keywords
- Analog and mixed-signal systems
- Neural networks
- Nonlinear modeling
- Piecewise linear
- Simulation