Design of parallel Tomlinson-Harashima precoders

Yongru Gu, Keshab K. Parhi

Research output: Contribution to journalArticlepeer-review

3 Scopus citations

Abstract

Like decision feedback equalizers (DFEs), Tomlinson-Harashima precoders (TH precoders) contain nonlinear feedback loops, which limit their use for high-speed applications. Unlike in DFEs, where the output levels of the nonlinear devices are finite, in TH precoders the output levels of the modulo devices are either infinite or finite but very large. Thus, it is difficult to apply look-ahead and pre-computation techniques to speed up TH precoders, which were successfully applied to design parallel and pipelined infinite impulse response (IIR) filters and DFEs in the past. However, a TH precoder can be viewed as an IIR filter with an input equal to the sum of the original input to the TH precoder and a finite-level compensation signal. Based on this point of view, a novel parallel architecture is proposed to speed up TH precoders. This architecture can be used in many high-speed applications, such as 10-Gb Ethernet over copper.

Original languageEnglish (US)
Pages (from-to)447-451
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume55
Issue number5
DOIs
StatePublished - May 2008

Keywords

  • High-speed Ethernet transceiver
  • Look-ahead
  • P802.3an
  • Parallel processing
  • Pipelining
  • Tomlinson-Harashima precoder

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