Efficient In-Memory Processing Using Spintronics

Zamshed I Chowdhury; Jonathan D. Harms; S. Karen Khatamifard; Masoud Zabihi; Yang Lv; Andrew P. Lyle; Sachin S Sapatnekar; Ulya Karpuzcu; Jianping Wang

doi:10.1109/LCA.2017.2751042

Efficient In-Memory Processing Using Spintronics

Zamshed I Chowdhury, Jonathan D. Harms, S. Karen Khatamifard, Masoud Zabihi, Yang Lv, Andrew P. Lyle, Sachin S Sapatnekar, Ulya Karpuzcu, Jianping Wang

Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

48 Scopus citations

Abstract

As the overhead of data retrieval becomes forbidding, bringing processor logic to the memory where the data reside becomes more energy-efficient. While traditional CMOS structures are unsuited to the tight integration of logic and memory, emerging spintronic technologies show remarkable versatility. This paper introduces a novel spintronics-based processing-in-memory (PIM) framework called computational RAM (CRAM) to solve data-intensive computing problems.

Original language	English (US)
Pages (from-to)	42-46
Number of pages	5
Journal	IEEE Computer Architecture Letters
Volume	17
Issue number	1
DOIs	https://doi.org/10.1109/LCA.2017.2751042
State	Published - Jan 1 2018

Bibliographical note

Funding Information:
This work is supported by DARPA Non-Volatile Logic program, NSF SPX grant no. 1725420, and by C-SPIN, one of the six SRC STARnet Centers, sponsored by MARCO and DARPA. Chowdhury and Harms equally contributed to this work.

Publisher Copyright:
© 2017 IEEE.

Keywords

CRAM
MTJ
STT-MRAM
processing-in-memory
spintronics

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/LCA.2017.2751042

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AU - Sapatnekar, Sachin S

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Efficient In-Memory Processing Using Spintronics

Abstract

Bibliographical note

Keywords

UN SDGs

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