Abstract
Rapid advances in CMOS technology continue to increase the on-chip clock speeds exponentially, while high-speed I/Os that are used to connect between chips continue to be a performance bottleneck for the system. Finite channel bandwidths generate ISI and reduce the amplitude of the received signal and thus degrade SNR.
Original language | English (US) |
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Title of host publication | Analog Circuits and Signal Processing |
Publisher | Springer |
Pages | 1-9 |
Number of pages | 9 |
DOIs | |
State | Published - 2014 |
Publication series
Name | Analog Circuits and Signal Processing |
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ISSN (Print) | 1872-082X |
ISSN (Electronic) | 2197-1854 |
Bibliographical note
Publisher Copyright:© 2014, Springer Science+Business Media New York.
Keywords
- Adjacent Channel
- Crosstalk Signal
- Differential Pair
- Power Supply Rejection Ratio
- Pulse Response