Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits

Arvind K. Sharma; Meghna Madhusudan; Steven M. Burns; Soner Yaldiz; Parijat Mukherjee; Ramesh Harjani; Sachin S. Sapatnekar

doi:10.1109/ICCAD51958.2021.9643532

Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits

Arvind K. Sharma, Meghna Madhusudan, Steven M. Burns, Soner Yaldiz, Parijat Mukherjee, Ramesh Harjani, Sachin S. Sapatnekar

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

6 Scopus citations

Abstract

The common-centroid (CC) layout style is widely used to minimize the impact of variations among matched devices in analog blocks such as current mirror banks and differential pairs. This paper presents a constructive, performance-aware CC placement and routing algorithm for transistor arrays. Specifically, the proposed approach maximizes diffusion sharing, incorporates length of diffusion (LOD) based stress-induced performance variations, and mitigates resistive parasitics and electromigration (EM) hotspots, all of which are critical in modern technology nodes. The proposed algorithms are validated using cell- and circuit-level test cases in a commercial 12nm FinFET process. As compared to existing works, the cells generated using the proposed approach are shown to provide better performance in the presence of systematic variations, LOD, layout parasitics, and EM-induced degradation.

Original language	English (US)
Title of host publication	2021 40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781665445078
DOIs	https://doi.org/10.1109/ICCAD51958.2021.9643532
State	Published - 2021
Event	40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021 - Munich, Germany Duration: Nov 1 2021 → Nov 4 2021

Publication series

Name	IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
Volume	2021-November
ISSN (Print)	1092-3152

Conference

Conference	40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021
Country/Territory	Germany
City	Munich
Period	11/1/21 → 11/4/21

Bibliographical note

Funding Information:
This work is supported in part by the DARPA IDEA program, as part of the ALIGN project, under SPAWAR Contract N660011824048.

Publisher Copyright:
©2021 IEEE

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10.1109/ICCAD51958.2021.9643532

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Sharma, A. K., Madhusudan, M., Burns, S. M., Yaldiz, S., Mukherjee, P., Harjani, R., & Sapatnekar, S. S. (2021). Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits. In 2021 40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021 - Proceedings (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; Vol. 2021-November). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICCAD51958.2021.9643532

Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits. / Sharma, Arvind K.; Madhusudan, Meghna; Burns, Steven M. et al.
2021 40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2021. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; Vol. 2021-November).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Sharma, AK, Madhusudan, M, Burns, SM, Yaldiz, S, Mukherjee, P, Harjani, R & Sapatnekar, SS 2021, Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits. in 2021 40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021 - Proceedings. IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD, vol. 2021-November, Institute of Electrical and Electronics Engineers Inc., 40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021, Munich, Germany, 11/1/21. https://doi.org/10.1109/ICCAD51958.2021.9643532

Sharma AK, Madhusudan M, Burns SM, Yaldiz S, Mukherjee P, Harjani R et al. Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits. In 2021 40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2021. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD). doi: 10.1109/ICCAD51958.2021.9643532

Sharma, Arvind K. ; Madhusudan, Meghna ; Burns, Steven M. et al. / Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits. 2021 40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2021. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

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Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits

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