Scaling, offset, and balancing techniques in FFT-based BP nonbinary LDPC decoders

Sangmin Kim; Gerald E. Sobelman

doi:10.1109/TCSII.2013.2251959

Scaling, offset, and balancing techniques in FFT-based BP nonbinary LDPC decoders

Sangmin Kim, Gerald E. Sobelman

Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

6 Scopus citations

Abstract

An analysis of finite precision effects in nonbinary mixed-domain low-density parity-check decoders is presented. It is shown how improved decoding performance can be achieved by using an offset-based method and proper scaling techniques. In addition, a novel fast Fourier transform (FFT)-based belief propagation (BP) decoder architecture is proposed which balances the computational load between processing units. The results show a 47% reduction in the number of required field-programmable gate array slices compared to a standard FFT-based BP architecture.

Original language	English (US)
Article number	6488777
Pages (from-to)	277-281
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
Volume	60
Issue number	5
DOIs	https://doi.org/10.1109/TCSII.2013.2251959
State	Published - 2013

Keywords

Decoding
Galois field (GF)
field-programmable gate array (FPGA)
low-density parity check (LDPC)
quantization

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title = "Scaling, offset, and balancing techniques in FFT-based BP nonbinary LDPC decoders",

abstract = "An analysis of finite precision effects in nonbinary mixed-domain low-density parity-check decoders is presented. It is shown how improved decoding performance can be achieved by using an offset-based method and proper scaling techniques. In addition, a novel fast Fourier transform (FFT)-based belief propagation (BP) decoder architecture is proposed which balances the computational load between processing units. The results show a 47% reduction in the number of required field-programmable gate array slices compared to a standard FFT-based BP architecture.",

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AB - An analysis of finite precision effects in nonbinary mixed-domain low-density parity-check decoders is presented. It is shown how improved decoding performance can be achieved by using an offset-based method and proper scaling techniques. In addition, a novel fast Fourier transform (FFT)-based belief propagation (BP) decoder architecture is proposed which balances the computational load between processing units. The results show a 47% reduction in the number of required field-programmable gate array slices compared to a standard FFT-based BP architecture.

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KW - low-density parity check (LDPC)

KW - quantization

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Scaling, offset, and balancing techniques in FFT-based BP nonbinary LDPC decoders

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