Abstract
We propose a new device based on standard spin Hall magnetic tunnel junction-based spintronic neurons, which allows them to compute multiple neural network functionalities simultaneously and in parallel, saving space and time. An approximation to the rectified linear unit transfer function and the local pooling function is computed simultaneously with the convolution operation itself. A proof-of-concept simulation thoroughly explores the behavior of the device, predicting that the operations can be performed with up to 99% precision at a cost of about 6 pJ per 3×3 pooling template. The simulations are remarkably robust to thermal noise, performing well even with very small magnetic layers.
Original language | English (US) |
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Article number | 8957360 |
Pages (from-to) | 487-492 |
Number of pages | 6 |
Journal | IEEE Transactions on Electron Devices |
Volume | 67 |
Issue number | 2 |
DOIs | |
State | Published - Feb 2020 |
Bibliographical note
Funding Information:Manuscript received September 4, 2019; revised October 30, 2019; accepted December 10, 2019. Date of publication January 13, 2020; date of current version January 27, 2020. This work was supported by Seagate Technology PLC. The review of this article was arranged by Editor T.-H. Kim. (Corresponding authors: Andrew W. Stephan; Steven J. Koester.) The authors are with the Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN 55455 USA (e-mail: steph506@umn.edu; skoester@umn.edu).
Publisher Copyright:
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Keywords
- CMOS
- magnetic tunnel junction (MTJ)
- neuromorphic computing
- spin Hall
- spintronics