Abstract
In this paper, we propose a Stochastic iterative multiple-input multiple-output (SIM) detection system based on the Markov chain Monte Carlo (MCMC) method. To improve the detection performance, the Gibbs sampler of the MCMC detector in the SIM is updated by the decoded bits from a channel decoder directly. The channel decoder is part of the updating unit that generates the new samples in the MCMC updating process. We also implement the SIM in a fully parallel scheme, which achieves a high detection speed. As a case study, we have designed and synthesized a 128-parallel 4 x 4 16-QAM SIM system using a CMOS 130 nm technology with a core area of 1.98 mm2 and 457K logic gates. The SIM detection system can achieve a throughput of 787.5Mbps with a frame error rate (FER) 10-3 at Eb/N0 = 7dB, equaling the FER of a traditional iterative MIMO detection with four outer iterations.
Original language | English (US) |
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Article number | 7070862 |
Pages (from-to) | 1205-1214 |
Number of pages | 10 |
Journal | IEEE Transactions on Circuits and Systems I: Regular Papers |
Volume | 62 |
Issue number | 4 |
DOIs | |
State | Published - Apr 1 2015 |
Bibliographical note
Publisher Copyright:© 2004-2012 IEEE.
Keywords
- Markov chain Monte Carlo (MCMC)
- multiple-input multiple-output (MIMO) system
- stochastic iterative MIMO (SIM)
- stochastic logic