TY - GEN
T1 - VLSI architecture design for reconfigurable block size motion estimation
AU - Li, Peng
AU - Tang, Hua
PY - 2010/4/1
Y1 - 2010/4/1
N2 - This paper presents a VLSI architecture to support full-search motion estimation with reconfigurable block size, which is well needed in video based surveillance applications. Experiment results show that the proposed architecture achieves the flexibility of adjustable block size at the expense of only 5% hardware overhead compared to the traditional design.
AB - This paper presents a VLSI architecture to support full-search motion estimation with reconfigurable block size, which is well needed in video based surveillance applications. Experiment results show that the proposed architecture achieves the flexibility of adjustable block size at the expense of only 5% hardware overhead compared to the traditional design.
UR - http://www.scopus.com/inward/record.url?scp=77950163268&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77950163268&partnerID=8YFLogxK
U2 - 10.1109/ICCE.2010.5418945
DO - 10.1109/ICCE.2010.5418945
M3 - Conference contribution
AN - SCOPUS:77950163268
SN - 9781424443161
T3 - ICCE 2010 - 2010 Digest of Technical Papers International Conference on Consumer Electronics
SP - 439
EP - 440
BT - ICCE 2010 - 2010 Digest of Technical Papers International Conference on Consumer Electronics
T2 - 2010 International Conference on Consumer Electronics, ICCE 2010
Y2 - 11 January 2010 through 13 January 2010
ER -